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| SD56120M RF POWER TRANSISTORS The LdmoST FAMILY N-CHANNEL ENHANCEMENT-MODE LATERAL MOSFETs * EXCELLENT THERMAL STABILITY * COMMON SOURCE CONFIGURATION, PUSHPULL * POUT = 120 W WITH 13 dB gain @ 860 MHz /32V * BeO FREE PACKAGE * INTERNAL INPUT MATCHING ORDER CODE SD56120M M252 epoxy sealed BRANDING SD56120M DESCRIPTION The SD56120M is a common source N-Channel enhancement-mode lateral Field-Effect RF power transistor designed for broadband commercial and industrial applications at frequencies up to 1.0 GHz. The SD56120M is designed for high gain and broadband performance operating in common source mode at 32 V. Its internal matching makes it ideal for TV broadcast applications requiring high linearity. PIN CONNECTION 1 2 3 5 4 1. Drain 2. Drain 3. Source 4. Gate 5. Gate ABSOLUTE MAXIMUM RATINGS (TCASE = 25C) Symbol V(BR)DSS VGS ID PDISS Tj TSTG Drain-Source Voltage Gate-Source Voltage Drain Current Power Dissipation (@ Tc = 70C) Max. Operating Junction Temperature Storage Temperature Parameter Value 65 20 14 236 200 -65 to +150 Unit V V A W C C THERMAL DATA Rth(j-c) Junction -Case Thermal Resistance 0.55 C/W March, 11 2003 1/8 SD56120M ELECTRICAL SPECIFICATION (TCASE = 25C) STATIC (Per Section) Symbol V(BR)DSS IDSS IGSS VGS(Q) VDS(ON) GFS CISS* COSS CRSS VGS = 0 V VGS = 0 V VGS = 20 V VDS = 28 V VGS = 10 V VDS = 10 V VGS = 0 V VGS = 0 V VGS = 0 V Test Conditions IDS = 10 mA VDS = 28 V VDS = 0 V ID = 100 mA ID = 3 A ID = 3 A VDS = 28 V VDS = 28 V VDS = 28 V f = 1 MHz f = 1 MHz f = 1 MHz 2.0 0.7 3 221 48.9 2.25 Min. 65 1 1 5.0 0.8 Typ. Max. Unit V A A V V mho pF pF pF * Includes Internal Input Moscap. DYNAMIC Symbol POUT GPS D Load mismatch VDD = 32 V VDD = 32 V VDD = 32 V Test Conditions IDQ = 400 mA IDQ = 400 mA IDQ = 400 mA POUT = 120 W POUT = 120 W POUT = 120 W f = 860 MHz f = 860 MHz f = 860 MHz f = 860 MHz Min. 120 13 50 10:1 16 Typ. Max. Unit W dB % VSWR VDD = 32 V IDQ = 400 mA ALL PHASE ANGLES IMPEDANCE DATA D ZDL Typical Input Impedance G Zin Typical Drain Load Impedance S FREQ. 860 MHz ZIN () 5.57 + j 3.488 ZDL() 4.21 - j 2.88 Measured drain to drain and gate to gate respectively. 2/8 SD56120M TYPICAL PERFORMANCE Capacitance vs. Drain Voltage Gate-Source Voltage vs. Case Temperature Vgs, GATE-SOURCE VOLTAGE (NORMALIZE 1000 C, CAPACITANCE (pF) Ciss 1.03 1.02 1.01 1 0.99 ID = 2 A ID = 5 A 100 Coss ID = 4 A ID = 3 A 10 Crss f =1 MHz 0.98 VDS = 10 V ID = 1 A 0.97 0.96 -20 1 0 5 10 15 20 25 Vds, DRAIN-SOURCE VOLTAGE (V) 30 0 20 40 60 80 Tc, CASE TEMPERATURE (C) Drain Current vs. Gate Voltage 9 8 Id, DRAIN CURRENT (A) Vds= 10V 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 Vgs, GATE-SOURCE VOLTAGE (V) 3/8 SD56120M TYPICAL PERFORMANCE Output Power & Efficiency vs. Input Power Power Gain vs. Output Power 180 Pout, OUTPUT POWER (W) 160 140 120 100 80 60 40 20 0 0 1 2 3 4 5 6 Pin, INPUT POW ER (W ) Vdd = 32 V Idq= 2 x 200 mA f = 860 MHz Eff Pout 100 Gp, POWER GAIN (dB) 20 Nd , EFFICIENCY (%) 90 80 70 60 50 40 30 20 19 Idq = 2 x 400mA Idq = 2 x 600mA Idq = 2 x 300mA Idq = 2 x 200mA 18 17 16 15 14 13 12 1 Vdd = 32V f = 860 MHz 10 100 1000 Pout, OUTPUT POWER (W) Intermodulation Distortion vs. Output Power IMD3, INTERMODULATION DISTORTION (dBc) Output Power vs. Drain Voltage -10 Pout, OUTPUT POWER (W) 210 180 150 120 90 60 30 0 12 16 20 24 28 32 36 Pin = 1.25 W Vdd = 32 V Idq = 2 x 200 mA f = 860 MHz Pin = 5 W -15 -20 -25 -30 -35 -40 -45 -50 0 30 60 90 f1= 860 MHz f2= 859.9 MHz Vdd = 32 V Idq = 2 x 200 mA Idq = 2 x 400 mA Idq = 2 x 625 mA Pin = 2.5 W 120 150 Pout, OUTPUT POWER (WPEP) Vds, DRAIN VOLTAGE (V) 4/8 SD56120M TEST CIRCUIT SCHEMATIC D.U.T. NOTEs: 1. C3 AND C4 ADJACENT TO EACH OTHER 2. GAP BETWEEN GROUND & TRANSMISSION LINE = 0.056 [1.42] TYP. REF. 7248365A TEST CIRCUIT COMPONENT PART LIST COMPONENT C1, C2, C10, C11 C3 C4, C8 C5, C9 C6 C7 C12, C15, C18, C22 C13, C16, C20, C24 C14, C17, C21, C25 C19, C23 R1, R2, R3, R4 R5, R6 B1, B2 L1, L2 FB1, FB2 PCB DESCRIPTION 51 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 9.1 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 0.6 - 4.5 GIGATRIM VARIABLE CAPACITOR 5.6 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 12 pF ATC 100A SURFACE MOUNT CERAMIC CHIP CAPACITOR 13 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 91 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 10 F 50V ALUMINUM ELECTROLYTIC RADIAL LEAD CAPACITOR 0.1 F 500V SURFACE MOUNT CERAMIC CHIP CAPACITOR 100 F 63V ALUMINUM ELECTROLYTIC RADIAL LEAD CAPACITOR 200 OHM 1/4 W SURFACE MOUNT CHIP RESISTOR 1.8 OHM 1/4 W SURFACE MOUNT CHIP RESISTOR BALUN, 25 OHM SEMI-RIDGE OD="0.141", 2.37 LG COAXIAL CABLE OR EQUIVALENT CHIP INDICATOR 10 nH SURFACE MOUNT COIL SURFACE MOUNT EMI SHIELD BEAD WOVEN GLASS REINFORCED / CERAMIC FILLED 0.030" THK r = 3.48, 2 Oz ED CU BOTH SIDES 5/8 SD56120M TEST FIXTURE TEST CIRCUIT PHOTOMASTER 6.4 inches 6/8 4 inches SD56120M M252 (.400 x .860 4L BAL N/HERM W/FLG) MECHANICAL DATA mm Inch MAX 8.64 10.80 3.00 9.65 2.16 21.97 27.94 33.91 0.10 1.52 2.36 4.57 9.96 21.64 34.16 0.15 1.78 2.74 5.33 10.34 22.05 1.335 .004 .060 .093 .180 .392 .852 3.30 9.91 2.92 22.23 .118 .380 .085 .865 1.100 1.345 .006 .070 .108 .210 .407 .868 MIN. .320 .425 .130 .390 .115 .875 TYP. MAX .340 DIM. A B C D E F G H I J K L M N MIN. 8.13 TYP. Controlling dimension: Inches 1022783C 7/8 SD56120M Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2003 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. 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